The present invention relates to a method of manufacturing a semiconductor device, which can be used appropriately as a method of manufacturing, e.g., a semiconductor device including a solid-state image sensing element.
The development of a CMOS image sensor using a CMOS (Complementary Metal Oxide Semiconductor) as a solid-state image sensing element has been promoted. The CMOS image sensor is configured to include a plurality of pixels each having a photodiode and a transfer transistor. The photodiode and the transfer transistor are formed in a pixel region of a semiconductor substrate. On the other hand, in a peripheral circuit region of the semiconductor substrate, a transistor forming a logic circuit, i.e., a logic transistor is formed.
A manufacturing process of a semiconductor device including a CMOS image sensor as a solid-state image sensing element includes the step of introducing an impurity by ion implantation and the step of performing annealing, i.e., heat treatment for activating the impurity introduced by the ion implantation or curing crystal defects caused by the ion implantation. As a method for performing the annealing for activating the impurity or curing the crystal defects, furnace annealing using a batch-type or single-wafer-type annealing furnace, RTA (Rapid Thermal Anneal), laser annealing, or the like is used. When the annealing is performed by such a method, the annealing needs to be performed at a high temperature of not less than 800° C.
On the other hand, as a method for performing such annealing at a lower temperature, microwave annealing is used.
Japanese Unexamined Patent Publication No. 2011-77408 (Patent Document 1) discloses a technique which cures crystal defects by microwave annealing and activates the impurity ions introduced by ion implantation by flash lamp annealing or laser annealing.
Japanese Unexamined Patent Publication No. 2002-43329 (Patent Document 2) discloses a technique which performs the step of activating an impurity element by a thermal annealing method using a furnace annealing furnace.
Japanese Unexamined Patent Publication No. Hei 1(1989)-120817 (Patent Document 3) discloses a technique which implants ions into a p-type silicon substrate and then applies a microwave thereto to activate the impurity ions.
Japanese Unexamined Patent Publication No. 2012-109503 (Patent Document 4) discloses a technique which performs, when a silicide layer is formed, first heat treatment using a single-wafer-type thermally conductive annealing device and then performs second heat treatment using a microwave annealing device.
Japanese Unexamined Patent Publication No. 2013-51317 (Patent Document 5) discloses a technique which forms photodiode and a transfer transistor each forming a solid-state image sensing element in a semiconductor substrate, further forms an interlayer insulating film over the semiconductor substrate, and then applies a microwave to the semiconductor substrate to heat the semiconductor substrate.